21 lines
244 B
Makefile
21 lines
244 B
Makefile
# Variable
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CC = gcc
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CFLAGS = -Wall -Wextra
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OBJ = main.o
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TARGET = sokoban
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all: $(TARGET)
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$(TARGET): $(OBJ)
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$(CC) $(CFLAGS) $(OBJ) -o $(TARGET)
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main.c : main.c
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$(CC) $(CFLAGS) -c main.c
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clean :
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rm -f $(OBJ) $(TARGET)
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.PHONY: all clean
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